The present invention relates in general to semiconductor manufacturing. More particularly, it relates to devices and methods for preventing capacitor leakage.
As the density of DRAM (Dynamic Random Access Memory) cells increases, dimensions of DRAM devices have to be decreased. This decreased size adversely influences the ability to provide the requisite DRAM capacitance. Increasing the vertical dimensions for DRAM, cup-shaped capacitor structures have allowed desired capacitance values for DRAM devices to be achieved. The increase in these vertical dimensions is usually accomplished via formation of cup-shaped capacitor structure, located in capacitor openings. The capacitor opening must be etched through a stop layer to expose the contact plug thereunder, and over-etching is necessary to ensure the capacitor opening is fully defined in every cell areas over a semiconductor wafer. When there is an overlay shift of the capacitor opening, the over-etching, however, produces a micro-trench under the capacitor opening, adversely affecting reliability.
The micro-trench problem discussed is illustrated in related art in FIGS. 1-2. This is not presented as prior art for the purpose of determining the patentability of the invention, but merely illustrates a problem found by the inventor. Referring to FIG. 1, a conductive contact plug 20 is formed through a first insulating layer 30 over a source/drain region 12 of a MOS field effect transistor (MOSFET) 10. A capacitor opening 45 is etched through a second insulating layer 40 and a stop layer 35 to expose the underlying contact plug 20. Over-etching is performed to compensate for variations in layer thickness and etch rates. The over-etch causes undesirable attacks on the first insulating layer 30 that is exposed when the stop layer 35 is etched away, thus forming a micro-trench 45a. FIG. 2 is a partially enlarged cross-section showing a capacitor subsequently formed in the capacitor opening 45 of FIG. 1. As shown in FIG. 2, a bottom electrode 50, a capacitor dielectric 55, and a top electrode 60 are sequentially deposited within the capacitor opening 45. Due to the presence of the micro-trench 45a, an unwanted sharp tip is formed at the bottom corner of the top electrode 60. This sharp tip induces a high electric field, causes capacitor dielectric leakage, and poses reliability risks associated with circuit open, breakdown, and TDDB (time dependent dielectric breakdown) failure. It is advantageous to reduce or eliminate the formation of the sharp tip.